硅基马赫曾德电光调制设计优化与实现

[摘要] 对单端推挽驱动硅基调制器进行了优化设计和实验验证。为了获得较高的调制器性能，首先对PN结的结构参数和掺杂浓度进行了仿真优化，以提高调制效率并降低光传输损耗；其次，对行波电极的阻抗匹配、相位匹配和微波损耗予以了研究，重点分析了低掺杂平板区宽度、行波电极传输线宽度（TWE）和间距对调制性能的影响。在理论分析和仿真计算的基础上，对单端推挽驱动调制器进行了频谱测试、小信号响应测试和高速调制码型测试。调制器的片上插入损耗在7～9 dB，半波电压约为5 V。偏置电压为0 V时，优化后的调制器的带宽大于18 GHz，入射端反射系数低于-20 dB，行波电极具有较好的阻抗匹配。当反偏电压大于4 V时，调制器的带宽可增加到30 GHz以上，并且能实现56 Gbit/s的二进制强度（OOK）调制和40 Gbit/s的二进制相移键控（BPSK）调制。

[关键词] 电光调制器；硅基光电子；高速收发模块；光电子器件

[Abstract] In this paper, the design optimization and experimental demonstration of single-drive push-pull silicon electro-optic modulators are presented. In order to improve the modulation efficiency and lower the optical propagation loss, the PN junction profile and doping concentrations are firstly optimized. Next, the impedance match, phase match and microwave loss are studied, and in particular, the influence of low-doping slab width, travelling-wave electrode (TWE) width and spacing on the modulator performance are analyzed. Following the comprehensive theoretical analysis and numerical simulation, the modulator performance measurements, including the optical transmission spectrum upon single-drive push-pull tuning, small-signal microwave signal response, and high-speed digital signal modulation are consequently carried out. The on-chip insertion loss of the modulators is around 7－9 dB and the half-wave voltage is 5 V. At a bias voltage of 0 V, the optimized modulator has a modulation bandwidth of >18 GHz. The microwave reflectivity at the entrance of the TWE is less than -20 dB, suggesting good impedance match. When the reverse bias voltage is increased to 4 V, the modulation bandwidth can exceed 30 GHz, allowing for realization of 56 Gbit/s on-off keying (OOK) and 40 Gbit/s binary phase-shift keying (BPSK) modulations.

[Keywords] electro-optic modulator; silicon photonics; high-speed transceiver; optoelectronic devices